Detailed description of the ESC4-A motor driver board

Design philosophy

The feature mix was determined by the requirement of generating every signal needed for a typical ROV using two ESC4 boards, each board receiving a PPM signal from one vEx transmitter. As such, the board is rather versatile.

The board uses industry-standard components wherever possible to minimize procument problems. The only single-sourced part is the Xilinx CPLD.

Each section is described in detail below.

Motor drive

The H bridge 48V 10A motor driver circuit converts PPM signals from the vEx R/C receiver to run four 12V, 10A DC brushed motors from a 48V bus. Since the supply voltage is 4x the rated motor voltage, a 25% duty cycle will produce full motor power as it makes the full 12V-equivalent current in the motor. This allows the board to drive four motors, each in its own 25 KHz PWM time slot, while drawing 10 Amps or less from the 48V battery.

There is a common part called a half-bridge driver IC that drives the gates of one set of high and low side MOSFETs. It requires a 12VDC power source and accepts two TTL gate enable signals.

Each motor driver senses the motor current to ensure that the motor won't burn out if stalled. A sense resistor on each low side switch develops voltage proportional to current: 0.02 ohm gives 0.2V for 10A current.

A pair of comparators in the LM393 monitor the voltage across the two sense resistors. Two comparators are used because either low-side switch may have the continuous motor current across it, depending on the motor direction. If either comparator detects an overcurrent condition, it pulls the FAULT signal low, which tells the FPGA to turn off the current to the motor in question until it drops to a safe level.

Each comparator input has a low-pass filter to measure average current. The time constant is 3 PWM cycles. This ensures that the average current of the motor is being measured, rather than any switching transients.

The comparator voltage reference is an adjustable voltage divider driven by the 3.3V supply. The adjustment range is 0 to 0.2 volt for a 0 to 10 Amp current limit range using a 0.02 ohm resistor.

Controller

The controller is implemented in a CPLD. This device was chosen because it can be configured to perform multiple tasks simultaneously. A microcontroller is limited in speed and suffers from code complexity when trying to decode a PWM input while simultaneously generating four PWM outputs. We could write that code, but it would cost a lot more in time and aggravation and debugging than the $16 CPLD cost.

The Xilinx XPLA3 series is old enough to be 3.3V useable and new enough to still be made. It provides 256 registers, 120 I/O lines and a big PLA routing array in a smallish 19x19mm 144 pin TQFP with 0.5mm lead pitch, scary-looking but quite solderable with a standard soldering iron and some tricks.

The FPGA motor controller contains the following modules. Each is implemented in a separate VHDL source file. The main VHDL file is called drive.vhd and contains the code to connect the modules to the device pins and to each other. The constraint file drive.ucf has the pin assignments.

RC input pulse decoder rcin.vhd

The control system sends a standard six-channel R/C pulse train with seven sequential pulses representing sync and four motor speeds and two on/off switches. The signal from the vEx controller is inverted and open-collector. A 1.14ms long pulse signals full reverse, a 1.54ms pulse is zero motion, and a 1.94ms pulse is full forward. The sync pulse is 9ms long. The above pulse times include the 400us "off" time.

The pulses are decoded by the input pulse timer circuits. Note that the speed value has a range of 0 to 200, corresponding to the 400 microsecond maximum pulse length variation. This range is accommodated by the PWM generator by issuing a start pulse every 200 microseconds.

A 14 bit counter with two sections, usec(10 bits) and msec(4 bits), running at 1 MHz, is reset when the RC input rises. It counts up at all other times. The time counts and RC input values determine the next state of a state machine.

A channel counter is set to 0 by the end of the start pulse, then increments on every falling edge of RC in. Channels are 1 through 6. Channel 7 is an error.

When the RC input falls, an integer msec value of 1 is considered a valid command. The speed and direction values are copied to that channel's output register. Bit 9 of usec is the motor direction. The speed value is inverted on the way to the channel's speed register if direction is negative.

If phase ever reaches a timeout time greater than the longest possible valid start pulse width, the framing error state is entered.

*** not implemented yet *** The state machine starts in a search mode to detect five good frames with zero control input, then starts responding to input data. This is done with a good-frame counter. An out-of-spec pulse time sends the machine to the search mode and stops the motors.

Four PWM motor drivers pwm.vhd

Each motor driver converts an 8 bit speed command to a 31.25 kHz PWM stream whose duty cycle ranges of 0 to 25%. The direction bit steers the pulses to the proper H bridge driver inputs as shown below. There's one dead clock cycle while switching the drivers over from active to inactive and back.

direction active phase inactive phase Forward A hi, B low A low, B low Reverse A low, B hi A low, B low

A channel sequencer issues sequential start commands each 8 microsecond time slice, allowing each motor to run for up to 8 microseconds out of 32, for a 25% maximum duty cycle. The PWM downcounter runs at 25 MHz for up to 200 counts.

Two up/down channels

The vEx transmitter has two up/down buttons on channels 5 and 6. One of these controls the switched 12V power.

Servo speed controller servo.vhd

The camera tilts with a standard RC servo. Since it's inconvenient to hold the spring-centered vEx joystick in the desired camera position, the joystick functions as a speed controller for the servo motion.

This is done by integrating the joystick command into a position accumulator that counts up or down at a rate proportional to the joystick command. The speed has four steps in each direction.

Lighting and power supplies

The 12V power supply is made with a Simple Switcher chip from National. Each board has a 3A 12V switching regulator to power its internal 12V needs and to provide power to external devices.

Each controller board has one switched 12V power ouput. This is implemented with an N-channel MOSFET on the low side. The load has + and - terminals that are both floating from ground. The control is one pair of on/off buttons on the rear of the vEx transmitter.

Mechanical design

The PC board is a two-layer, plated-through board populated with both surface-mount and through-hole components. All component designators and connector functions are labeled.

The PC board is designed to minimize electrical resistance of all the motor power paths. The 48V power is routed through a low-pass filter and along both edges of the board on both top and bottom sides to feed the four motor controllers. Since each motor may draw up to 10 Amps, the power path is the same size to all motor drivers.

The component placement is driven by the need to maintain wide power paths to the H bridge controller transistors while placing all transistors near the board edges for ease of heat sinking.

PC board mounting

The PC board is designed to be mounted to an aluminum heat sink plate of at least 7.5" x 4.0" in size using 4-40 hardware. The through-hole part leads are trimmed very close to the board with micro-flush diagonal cutters and then covered with Kapton insulating tape to prevent short circuits to the ehat sink plate.

The arrangement of all mounting holes is symmetrical to allow mounting two boards on both sides of a heat sink plate using through holes, screws and nuts.

The TO-220 transistors have either isolated tabs or metal tabs that are electrically connected to the negative battery lead, so no insulating washers are needed on any TO-220 packages. however, a small amount of heat sink compound is required under all devices to provide good thermal connection to the heat sink plate.

The 5-pin TO-220 switching controller mounting method requires the board to be spaced .031" above the mounting plate. The flat washers that are sold with DB-25 jackscrews make ideal spacers for the bottom of the board.

Layout errors

The circuit board as fabricated has several errors. These have been corrected through the rework steps described below. The artwork will be corrected before making any future PC board production runs.

1. The footprint for the CPLD is too small. The part legs were modified by pressing each row of legs against a table with the part held vertically to move the legs closer to the part body.

2. The footprint for the 2512 resistors is too small. The parts were installed by tinning the pads and the part ends, then heating the solder while holding the part centered over the footprint.

3. There is no pullup resitor on either vEx input. This was corected by adding a pair of 3.3K resistors to the end of R1 and R2 closest to J3, with a common wire to the 3.3V pin on D4 (the pin closest to R1).

4. The reset supervisor was omitted. This was corrected by adding an MCP102-3.0 chip next to C65, using C65 for its power supply source and attachment points, and a wire connecting its output to U2 pin 108.

Changes for next revision

The regulator chip ought to be connected with through holes arranged in a zig-zag pattern. This will allow the board to be spaced with slightly different height of spacers.